Programmable logic devices are used in a variety of electronic equipment. Each programmable logic device is initially a "blank slate" that can be programmed to implement specified functions. The advantage of a programmable logic device is that it is relatively inexpensive since a mass-produced device can be created and subsequently programmed to perform a specified function. This approach is less expensive than designing an application specific integrated circuit (ASIC) to implement the same function.
The Flex 10K family of programmable logic devices sold by Altera Corporation, San Jose, Calif., is widely known in the art. Each Flex 10K programmable logic device includes an embedded array and a logic array. The embedded array is used to implement general logic in a conventional "sea-of-gates" architecture. In addition, the embedded array has dedicated die areas for implementing large, specialized programmable functions. In particular, the embedded array can be used to implement memory functions, such as random access memory (RAM), read only memory (ROM), and first-in-first-out (FIFO) functions. In addition, the embedded array can be used to implement logic functions, such as multipliers, microcontrollers, and state machines. Logic functions are implemented by programming the embedded array with a read-only pattern during configuration, thereby creating a large look-up table (LUT). In this LUT, combinatorial functions are implemented by looking up the results, rather than by computing them. This implementation of combinatorial functions is faster than using algorithms implemented in general logic.
The logic array portion of the Flex 10K programmable logic device is also used to implement logic functions. That is, it is used to implement general logic, such as counters, adders, state machines, and multiplexers. The logic array has a larger die area and slower speed compared to the embedded array.
A programmable logic device, such as a Flex 10K programmable logic device, is configured to implement specified functions. A configuration file is used to implement the specified functions. In other words, an engineer generates a configuration file which is used to configure a programmable logic device to perfrom a set of specified functions.
Once a configuration file is established, it is necessary to test the operation of the proposed configuration. A test file is used for this purpose.
Thus, in order to implement a programmable logic device, it is necessary to establish a configuration file and a test file. These files are generally generated through the use of a bit-level static configuration and test generation program. FIG. 1 illustrates a bit-level static configuration and test generation program 20A in accordance with the prior art. The figure also illustrates that the program is used to produce a configuration file 22A and a test (or vector) file 24A. These two files are then applied to a configurable device (programmable logic device) 26A. That is, the configuration file 22A is initially used to configure the configurable device 26A. Thereafter, the test file 24A is applied to the configurable device 26A to confirm that it is operating as intended.
FIG. 1 illustrates that configurable device 26A has a corresponding bit-level static configuration and test generation program 20A. Similarly, other configurable devices, A through N, each have a dedicated bit-level static configuration and test generation programs 20A-20N. In other words, in the prior art, it is necessary to construct a bit-level static configuration and test generation program for each configurable device. This approach is obviously problematic because it requires a large number of programs. Moreover, this approach is problematic because an operator of the program must have a bit-level understanding of the configurable device that is being worked with.
In view of the foregoing, it would be highly desirable to generate a single configuration and test generation program that could be used for a variety of configurable devices. Preferably, such a program would not require a bit-level understanding of the configurable device to be programmed. In other words, preferably, a more generalized approach to device programming and testing would be afforded.